Digital Trainer to Verify Adder and Subtractor using NAND Gates
Digital Trainer to Verify Adder and Subtractor using NAND Gates
Instrument comprises of DC Regulated Power Supply 5 VDC/150mAfor logic inputs, 4 SPDTswitches provided for selecting logic ‘1’ logic ‘0’, 3 NOT gates for providing compliments of the logic inputs, 2 Red LED output indicator, circuit diagram printed for 5 number three input ‘NAND’ gate with their respective IC’s placed inside the cabinet. Connections are brought out at socket/terminals on the front panel.